The present invention relates to a multi-phase pulse generator, and more particularly to a multi-phase pulse generator applying a concept of negative delay.
A ring oscillator is a type of pulse generator used for a semiconductor device. The ring oscillator is a circuit that generates pulses having a uniform frequency. The pulse generator, such as the ring oscillator, is a basic circuit that can be used in various fields including a phase locked loop (PLL), a direct current to direct current converter (DC-DC converter), a counter, and a frequency synthesizer.
A pulse generator made of a generic single ring oscillator outputs pulse signals having a uniform frequency. A period of the pulse signal output from the pulse generator, i.e., the frequency, is determined by the delay time in each of the stages and the number of stages provided inside.
As semiconductor devices reach higher speeds, the pulse generators used in these devices require higher frequencies. For a higher frequency, the pulse generator applies the concept of negative delay.
FIG. 1 shows an example of a pulse generator applying the negative delay concept, in which block B1, B2, B3, B4, B5 of each stage has an inverter comprising the combination of a PMOS transistor and a NMOS transistor, and a negative delay (−D) is applied to the gate of the PMOS transistor in each block B1, B2, B3, B4, B5. In the pulse generator of FIG. 1, the PMOS transistor P1 and NMOS transistor N1 have a turn-on time different from each other by a negative delay −D. As a result, the frequency of the pulse signal outputted from a node ND1 is advantageously increased.
That is, when the output of the block (that is, ND1 in each block) transitions from low to high, the PMOS transistor P1 turns on earlier than the NMOS transistor N1, and when the output of the block transitions from high to low, the PMOS transistor P1 turns off earlier than the NMOS transistor N1.
The transition time needed to change the output level decreases, and the frequency of the output signal increases due to the negative delay. The negative delay is advantageous for increasing the frequency and generating an odd number of signals having the same phase at each node.
FIG. 2 shows one example of the pulse generator of FIG. 1 applying the negative delay concept. In FIG. 2, the combination of a PMOS transistor P2 and an NMOS transistor N2 is present in each of the unit blocks B11 to B15 at each of the stages that are looped, for example, from B11 to B12 to B13 to B14 to B15 then to B11 to form a loop. In this loop structure, each gate of the PMOS transistor P2 in a particular unit block receives an output signal from an output node ND2 of the unit block that precedes the receiving unit block by two stages in accordance with the negative delay concept (for example, P2 in B11 receives output node ND2 of B13, etc).
FIG. 1 and FIG. 2 show a single ring oscillator as an example of a pulse generator where the pulse generator includes an odd number of stages so that each node is not stable but oscillated, thereby generating an odd number of multi-phase pulses.
However, it is difficult to generate an odd number of multi-phase pulses by a pulse generator using a single ring oscillator.
The ring oscillator must have an even number of stages in order to obtain an even number of multi-phase pulses, but in this case as shown in FIGS. 1-2, the output between the blocks of the ring oscillator is stabilized and thus oscillation is not made.
Therefore, in order to generate an even number of multi-phase pulse signals, the prior art must further include a flip-flop block such as a counter, in addition to the pulse generator generating an odd number of signals as shown in FIG. 1 and FIG. 2.
However, if an additional unit such as a flip-flop block is included in a single ring oscillator, it will cause a problem due to the lowering of the frequency of the pulse signal generated by the pulse generator.